In recent years, multiple dissimilar general purpose microprocessor architectures have been used to attain a high level of assurance of integrity of general purpose microprocessor performance. These multiple processors are used in parallel, and their outputs are compared to reduce the likelihood of an undetected processor failure.
While these multiple dissimilar microprocessor architectures have been used extensively in the past, they do have some drawbacks. First of all, when these architectures are used for avionics computing systems, such as Flight Management Systems (FMS), Flight Control Systems (FCS), and any other avionics device or system, with their very long service lives, often in excess of thirty years, it frequently becomes very expensive to stock sufficient replacement parts. This problem is exacerbated by the rapid obsolescence and short production cycles for many modern general purpose microprocessors. Secondly, with the multiple dissimilar processor architecture, it is necessary to use separately designed, or at least separately compiled, software for each dissimilar processor. This, too, can be expensive to maintain over the service life of an avionics computing system.
Consequently, there exists a need for improved methods and systems for providing enhanced microprocessor integrity without the need for comparing the outputs of multiple dissimilar processors, operating in parallel.